Introduction
We have discussed and studied indepth in our earlier part of our tutorials on digital techniques, the three basic operations of the Binary system of numbers – namely the AND, OR and NOT operations. Now we study the NAND Gate in depth in this post. We also observed that all these operations can be carried out by electronic circuits with analogies in nature for better understanding.
I am sure that the study will help us in refreshing our memory about these gates and their truth tables for our development for the digital technique learning.
The truth tables, as we have seen before, present a precise picture of how the gates’ outputs behave in response to different input combinations.
What is actually a NAND gate?
NAND is simply a combination of NOT and AND gates, in both the verbatim and technical senses.

The term NAND is a contraction of the expression NOT-AND. Hence, it is ‘NAND’.
A NAND gate, therefore, is an AND gate followed by an inverter. You know that an inverter is also called NOT.
You know very well the logic symbol of AND gate as well as NOT gate. Both the gates connected as above as shown in the figure, the resultant function is the NAND gate. Please remember the logical functions of AND gate and NOT gate here.
The output of AND gate is fed to the inverter as A and B. The output is inverse of what is put both to AND gate. As such the result is the output of NAND gate. The figure above clearly explains every step in detail.
The output of a NAND gate is binary 0 if all its inputs are binary 1.
Mathematically, a NAND function is represented as
Q = (Q equals A and B not).

NAND Gate symbol and function

This is the symbol of NAND gate. AND+NOT=NAND. A and B are the two inputs and the output is Q, which is shown in the figure.
IC 7400 Quad 2-input NAND Gates

The integrated Circuit 7400 contains four Identical two-input NAND Gates In a single Package. IC 7400 Pin configuration is shown in fig. Pin 14 is connected to the positive power supply. Pin 7 is grounded.
The gates are completely independent except for a common power supply input pin. The circuit configuration of the IC is the same as shown in the figure below, except that the input transistor T1 has two emitters, which accept two independent inputs A and B. Not all gates are used in every application. Simply ignore the gates not used.

The IC works on +5 V regulated power supply. It is DIL 14-pin IC which is available in the electronics mart. We will have an exclusive lab experiment for the IC to prove the logic function as a practical approach for establishing the truth table.
Truth Table
The truth table given below explains the logic function of the NAND gate precisely. Inputs are given to A and B. The output is obtained at the output terminal marked as Q.
To make it clearer, we can frame the truth table by splitting the truth table into the AND gate and then the outcome to the NAND gate. The truth table is shown below.
AND+NOT =NAND Truth Table
| INPUT | AND Output | NAND Output | |
|---|---|---|---|
| A | B | Y | Q |
| 0 | 0 | 0 | 1 |
| 0 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 0 |
NAND gate Truth Table
| Input | Output | |
|---|---|---|
| A | B | Q |
| 0 | 0 | 1 |
| 0 | 1 | 1 |
| 1 | 0 | 1 |
| 1 | 1 | 0 |
When both the inputs are binary 0, the output is binary 1. When any one of the inputs is given binary 1, then the output binary is also 1. When both the inputs are given binary 1, then the output os binary 0. Conclusively we can arrive at the main logic function of NAND gate is ‘The output of a NAND gate is binary 0 if all its inputs are binary 1.‘
Conclusion
We have a clear idea about the setup of the NAND gate from the detailed discussion held with illustrations so far in the post. As such NAND gate is the combination of AND gate and an inverter arranged in such a way to get the NAND gate logic function. This is an important logic function that we may have electronics projects to build in our future posts.









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